BOUNDARY SCAN TESTING WITH LOOPBACKS
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United States of America Patent
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Issued Date -
Sep 29, 2016
app pub date -
Mar 23, 2015
filing date -
Mar 23, 2015
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
JTAG testing can be facilitated by providing loopbacks in a circuit that lacks a JTAG interface. A loopback may be created by connecting a receiving pin to a transmit pin of a circuit that lacks the JTAG interface. The loopback would cause a test value received in the circuit to be transmitted back out of the circuit. Therefore, a test value may be sent from an integrated circuit with a JTAG interface and then read back at the same integrated circuit with the JTAG interface. Using a loopback allows the interconnects between two integrated circuits to be tested despite one integrated circuit lacking a JTAG interface. Using the loopback also frees up pins for one of the integrated circuits that would otherwise be used by the JTAG interface.
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