Reduced Variation MOSFET Using a Drain-Extension-Last Process
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United States of America Patent
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Sep 8, 2016
app pub date -
May 16, 2016
filing date -
Feb 14, 2014
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Abstract
A MOSFET structure and method of manufacture that minimize threshold variations associated with statistical uncertainties of implanted source and drain extensions. The source and drain extensions are fabricated very late in the process using a material added to etched recesses immediately adjacent to the transistor's channel. In various embodiments, the added material may be germanium grown by selective epitaxy, doped silicon grown by selective epitaxy, or metallic materials created by deposition or by deposition and reaction.
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