CACHE SYSTEM WITH A PRIMARY CACHE AND AN OVERFLOW FIFO CACHE

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United States of America Patent

APP PUB NO 20160259728A1
SERIAL NO

14889114

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A cache memory system including a primary cache and an overflow cache that are searched together using a search address. The overflow cache operates as an eviction array for the primary cache. The primary cache is addressed using bits of the search address, and the overflow cache is configured as a FIFO buffer. The cache memory system may be used to implement a translation lookaside buffer for a microprocessor.

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Patent Owner(s)

Patent OwnerAddress
VIA ALLIANCE SEMICONDUCTOR CO LTDSHANGHAI 201203

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
EDDY, COLIN Austin, US 78 887
HOOKER, RODNEY E Austin, US 140 2878

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Patent Citation Ranking

  • 7 Citation Count
  • G06F Class
  • 11.69 % this patent is cited more than
  • 9 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges3122144564193188710466053822701961379632401 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +010002000300040005000600070008000900010000110001200013000140001500016000

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