SWITCHING CIRCUIT, SEMICONDUCTOR SWITCHING ARRANGEMENT AND METHOD
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United States of America Patent
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Aug 25, 2016
app pub date -
Feb 24, 2015
filing date -
Feb 24, 2015
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Abstract
In an embodiment, a switching circuit includes a high voltage depletion mode transistor having a first leakage current and operatively connected in a cascode arrangement to a low voltage enhancement mode transistor having a second leakage current. The second leakage current is larger than the first leakage current.
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