SEMICONDUCTOR SUBSTRATE ARRANGEMENT, A SEMICONDUCTOR DEVICE, AND A METHOD FOR PROCESSING A SEMICONDUCTOR SUBSTRATE
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United States of America Patent
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Jul 21, 2016
app pub date -
Jan 15, 2015
filing date -
Jan 15, 2015
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According to various embodiments, a semiconductor substrate arrangement may be provided, wherein the semiconductor substrate arrangement may include: a semiconductor substrate defining a first area at a first level and a second area next to the first area at a second level, wherein the first level is lower than the second level; a plurality of planar non-volatile memory structures disposed over the semiconductor substrate in the first area; and a plurality of planar transistor structures disposed over the semiconductor substrate in the second area.
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