MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
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United States of America Patent
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Jun 30, 2016
app pub date -
Dec 24, 2014
filing date -
Dec 24, 2014
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Abstract
Provided is a memory device including a substrate, a plurality of tunneling dielectric layers, a plurality of isolation structures, and a plurality of cap layers. The tunneling dielectric layers are located on the substrate. Each isolation structure has an upper portion and a lower portion. The lower portions of the isolation structures are located in the substrate and arranged alternately with the tunneling dielectric layers along a first direction. The upper portions of the isolation structures are located on the lower portions. The cap layers are located on the upper portions. A top surface of the cap layer is a planar surface.
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