INTEGRATED CIRCUITS AND METHODS FOR FABRICATING MEMORY CELLS AND INTEGRATED CIRCUITS
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United States of America Patent
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Issued Date -
Jun 30, 2016
app pub date -
Dec 29, 2014
filing date -
Dec 29, 2014
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Abstract
Integrated circuits and methods fabricating memory cells and integrated circuits are provided. In one embodiment, a method for fabricating a memory cell includes doping a semiconductor substrate to define a conductive region. The method includes forming a stacked structure over the semiconductor substrate. The stacked structure lies over the conductive region and includes a control gate overlying a floating gate. A source line region is formed adjacent a first side of the stacked structure. The method includes forming a contact over the semiconductor substrate and adjacent a second side of the stacked structure to define an electrical current path from the source line region through the conductive region under the stacked structure to the contact.
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