Leveraging instruction RAM as a data RAM extension during use of a modified Harvard architecture processor
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United States of America Patent
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Mar 6, 2018
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app pub date -
Dec 15, 2014
filing date -
Dec 15, 2014
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Abstract
On-chip instruction RAM is leveraged as an extension of on-chip data RAM during normal use of a modified Harvard Architecture processor. Unused space in an instruction RAM is detected in a modified Harvard Architecture processor. During operation of the processor this unused space is used to load and store data normally loaded and stored in an on-chip data RAM. A performance penalty associated with swapping out to external memory is reduced. The type of data stored in the unused portion of the instruction RAM may be selected to optimize performance. In one implementation, the unused space in the instruction RAM is used to load and store only a single type of data, such as heap, stack, initialized or uninitialized data.
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