NON-VOLATILE MEMORY AND FABRICATING METHOD THEREOF

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United States of America Patent

APP PUB NO 20160163552A1
SERIAL NO

14621403

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Abstract

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A non-volatile memory including a substrate, a first stacked structure, a second stacked structure, a fifth conductive layer, a first doped region, and a second doped region is provided. The first stacked structure includes a first conductive layer and a second conductive layer stacked on the substrate in order and isolated from each other. The second stacked structure is separately disposed from the first stacked structure and includes a third conductive layer and a fourth conductive layer stacked on the substrate in order and connected to each other. The fifth conductive layer is disposed on the substrate at one side of the first stacked structure away from the second stacked structure. The first doped region is disposed in the substrate below the fifth conductive layer. The second doped region is disposed in the substrate at one side of the second stacked structure away from the first stacked structure.

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Patent Owner(s)

Patent OwnerAddress
POWERCHIP TECHNOLOGY CORPORATIONNO 12 LI-HSIN RD I SCIENCE-BASED INDUSTRIAL PARK HSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Chen-Fu Taichung City, TW 22 45
Chen, Hui-Huang Changhua County, TW 13 124
Hsu, Cheng-Yuan Hsinchu City, TW 60 520
Ying, Tzung-Hua Hsinchu City, TW 8 19

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