METHOD FOR EXTRACTING TRAP TIME CONSTANT OF GATE DIELECTRIC LAYER IN SEMICONDUCTOR DEVICE

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United States of America Patent

SERIAL NO

14784881

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Abstract

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The present invention discloses a method for extracting a trap time constant of a gate dielectric layer in a semiconductor device, which is related to the reliability of microelectronic devices. The method comprises initializing a state of a trap in the semiconductor device so that the trap finally comes to an empty state; applying a DC or

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Patent Owner(s)

Patent OwnerAddress
PEKING UNIVERSITY100871 NO 5 THE SUMMER PALACE ROAD BEIJING HAIDIAN DISTRICT BEIJING CITY BEIJING CITY 100871

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
GUO, Shaofeng Beijing, CN 3 0
HUANG, Ru Beijing, CN 100 354
JIANG, Xiaobo Beijing, CN 8 5
LUO, Mulong Beijing, CN 1 0
REN, Pengpeng Beijing, CN 2 0
WANG, Runsheng Beijing, CN 20 98
ZHANG, Xing Beijing, CN 225 963

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