FIRST-PACKAGED AND LATER-ETCHED THREE-DIMENSIONAL FLIP-CHIP SYSTEM-IN-PACKAGE STRUCTURE AND PROCESSING METHOD THEREFOR

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United States of America Patent

APP PUB NO 20160148861A1
SERIAL NO

14901526

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Abstract

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A first-packaged and later-etched three-dimensional flip-chip system-in-package structure and a processing method thereof are provided. The package structure includes: a pad (1), a pin (2); a conductive pillar (3) disposed on an upper surface of the pin (2); a first die (4) flipped on an upper surface of the pad (1); a first molding material or epoxy resin (9) for encapsulating with a peripheral region of the conductive pillar (3) and the first die (4); an anti-oxidation layer (11) provided on a surface of the conductive pillar (3) exposed from the first molding material or epoxy resin (9); a second die (8) flipped on a lower surface of the pad (1) and the pin (2); and a second molding material or epoxy resin (10) for encapsulating with the region of the lower surfaces of the pad (1) and the pin (2) and a peripheral region of the second die (8). With the first-packaged and later-etched three-dimensional system-in-package flip-chip package structure and the processing method thereof, the following problem is solved: a function integration level of the whole package is limited because no object can be embedded into a conventional metal lead frame and an organic substrate, and a narrower width and a narrower pitch between lines is necessary for a conventional organic substrate.

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Patent Owner(s)

Patent OwnerAddress
JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO LTD214431 NO 275 MIDDLE BINJIANG ROAD JIANGSU JIANGYIN WUXI CITY JIANGSU PROVINCE 214431

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Liang, Chih-Chung Jiangsu, CN 5 28
Liang, Steve Xin Jiangsu, CN 6 108
Lin, Yu-bin Jiangsu, CN 6 35
Zhang, Chunyan Jiangsu, CN 21 159
Zhang, Kai Jiangsu, CN 1825 21629

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