DEVICE AND METHOD OF DETECTING SIGNAL DELAY
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United States of America Patent
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Issued Date -
May 26, 2016
app pub date -
Jul 9, 2015
filing date -
Nov 26, 2014
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Abstract
The present disclosure discloses a device for, and a method of, detecting a signal delay. The method of detecting a signal delay includes inputting a first signal and a second signal to a logic circuit to obtain an output signal; measuring an average voltage of the output signal; and determining a delay time of the second signal relative to the first signal based on a difference between the average voltage of the output signal and a reference voltage. The device for detecting a signal delay includes a clock output of a clock generator connected to a first logic input of a logic circuit and to a connection area for receiving a circuit to be tested. A second logic input of the logic circuit is also connected to the connection area. The voltage measurement device is connected to a logic output of the logic circuit.
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