A METHOD OF INHIBITING LEAKAGE CURRENT OF TUNNELING TRANSISTOR, AND THE CORRESPONDING DEVICE AND A PREPARATION METHOD THEREOF
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United States of America Patent
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May 12, 2016
app pub date -
Jan 9, 2014
filing date -
Nov 13, 2013
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Abstract
Provided are a method for suppressing a leakage current of a tunnel field-effect transistor (TFET), a corresponding device, and a manufacturing method, related to the field of field-effect transistor logic devices and circuits in CMOS ultra large-scale integration (ULSI). By inserting an insulating layer (7) between a source region (10) and a transistor body below a tunneling junction, and by inserting no insulating layer at a tunneling junction between a source region and a channel, a source/drain direct tunneling leakage current in a small-sized TFET device is effectively suppressed, and a threshold slope is effectively improved. The manufacturing method for the corresponding device is completely compatible with an existing CMOS process.
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