SUBSTRATES AND INTEGRATED CIRCUIT CHIP WITH IMPROVED PATTERN
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United States of America Patent
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Issued Date -
May 12, 2016
app pub date -
Oct 27, 2015
filing date -
Nov 6, 2014
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Abstract
The present invention relates to a substrate and integrated circuit chip with improved patterns, and more particularly to technology that is efficient in terms of thermal control and that can reduce the causes of occurrence of defects during the operation of a terminal to which a high voltage is applied. The present invention is characterized in that a first clearance distance between a first terminal, to which a voltage higher than voltages to be applied to the remaining terminals is applied, or first terminal pattern corresponding to the first terminal and a body pattern present between an integrated circuit chip and a substrate is larger than a second clearance distance between a second terminal, including at least some of the remaining terminals other than the first terminal, or second terminal pattern corresponding to the second terminal and the body pattern.
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