Method and system to prepare, manufacture and inspect mask patterns for a semiconductor device

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United States of America Patent

PATENT NO 10025175
SERIAL NO

14536031

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Abstract

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A system and method that includes receiving a layout of an integrated circuit (IC) device. A template library is provided having a plurality of parameterized shape elements. A curvilinear feature of layout is classified by selecting at least one of the parameterized shape elements that defines the curvilinear feature. A template index is associated with the layout is formed that includes the selected parameterized shape element. The template index and the layout can be delivered to a mask writer, which uses the template index and the layout to fabricate a pattern on a photomask.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD ("TSMC")NO 8 LI-HSIN RD 6 SCIENCE-BASED INDUSTRIAL PARK HSIN-CHU 300-77

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cheng, Wen-Hao Hsinchu, TW 102 272
Chou, Shuo-Yen Ji-an Shiang, TW 26 951
Liu, Ru-Gun Zhubei, TW 404 6961
Tsai, Chi-Ming Taipei, TW 98 501
Tu, Chih-Chiang Tauyen, TW 85 480

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