LEADLESS SEMICONDUCTOR DEVICE AND METHOD OF MAKING THEREOF

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United States of America Patent

APP PUB NO 20160126169A1
SERIAL NO

14527302

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Abstract

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Consistent with an example embodiment, there is a leadless packaged semiconductor device having top and bottom opposing major surfaces and sidewalls extending there between. The leadless packaged semiconductor device comprises a lead frame sub-assembly having an array of two or more lead frame portions each having a semiconductor die arranged thereon. At least five I/O terminals each of said terminals comprise a respective metal side pad; and the respective metal side pad has a step profile. A feature of this embodiment is that these metal side pads, having a step profile, are electroplated to enhance their solderability.

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Patent Owner(s)

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NXP B VHIGH TECH CAMPUS 60 EINDHOVEN NL-5656

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  • 2014 Application Filing Year
  • H01L Class
  • 23828 Applications Filed
  • 21803 Patents Issued To-Date
  • 91.51 % Issued To-Date
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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fung, Yee Wai Kwai Chung, HK 3 12
Ho, WaiKeung Kwai Chung, HK 2 12
Leung, Chi Ho Kwun Tong, HK 22 85

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  • 3 Citation Count
  • H01L Class
  • 13.47 % this patent is cited more than
  • 9 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges1792827316886303131891006776342711301 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +050010001500200025003000350040004500500055006000650070007500800085009000

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