METHOD FOR MANUFACTURING THREE-DIMENSIONAL INTEGRATED CIRCUIT
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United States of America Patent
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May 5, 2016
app pub date -
Oct 29, 2015
filing date -
Oct 29, 2014
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Abstract
A method for manufacturing a three-dimensional integrated circuit is disclosed. The method includes: providing a substrate; forming at least one metal layer and at least one dielectric layer on the substrate; forming a plurality of electrical connection points on the metal layer; dicing to generate a plurality package units, each of the package units adhered to a diced substrate; reversing each of the package units and connecting each of the reversed package units to a surface of a wiring substrate to form an integrated substrate; and removing the diced substrate of each of the reversed package units. The present disclosure can improve an assembling process.
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