SEMICONDUCTOR DEVICE AND METHOD FOR TESTING RELIABILITY OF SEMICONDUCTOR DEVICE
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
May 5, 2016
app pub date -
Oct 27, 2015
filing date -
Oct 31, 2014
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A semiconductor memory includes a memory controller including a plurality of processing circuits. The plurality of processing units includes an encryption/decryption unit that encrypts and decrypts a signal transmitted to and from the memory controller. The encryption/decryption unit includes a self test unit that performs a reliability test of the encryption/decryption unit on receipt of a predetermined test command from a testing device.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully