SEMICONDUCTOR FABRICATION METHOD
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United States of America Patent
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Issued Date -
Apr 28, 2016
app pub date -
Dec 16, 2014
filing date -
Oct 24, 2014
priority date (Note) -
Abandoned
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Abstract
A semiconductor fabrication method is disclosed. A substrate having thereon a plurality of semiconductor elements are provided. A dielectric layer is formed on the substrate. A plurality of openings is etched into the dielectric layer to respectively reveal the semiconductor elements. A material layer is coated on the substrate and the material layer fills into the openings. The material layer is then subjected to exposure and development processes to remove a portion of the material layer, thereby forming a material pattern. The material pattern is then polished by chemical mechanical polishing.
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