FINFET SEMICONDUCTOR DEVICE WITH ISOLATED CHANNEL REGIONS
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
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N/A
Issued Date -
N/A
app pub date -
Dec 9, 2015
filing date -
Mar 24, 2014
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A FinFET device includes a fin structure positioned in the channel region of the device and a gate structure positioned above the fin structure, wherein the fin structure includes a portion of a semiconductor substrate and an epi semiconductor material positioned vertically above the portion of the semiconductor substrate. Sidewall spacers are positioned adjacent the gate structure and a fin cavity is positioned in source/drain regions of the device, wherein the fin structure has edges in a gate width direction that are substantially self-aligned with the sidewall spacers and the semiconductor substrate defines the bottom of the fin cavity. A silicon etch stop layer is positioned on and in contact with the edges of the fin structure and within the fin cavity, and a stressed semiconductor material is positioned on and in contact with the silicon etch stop layer and at least partially within the fin cavity.
First Claim
Other Claims data not available