METHOD FOR ETCHING A HARDMASK LAYER FOR AN INTERCONNECTION STRUCTURE FOR SEMICONDUCTOR APPLICATIONS

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United States of America Patent

APP PUB NO 20160079088A1
SERIAL NO

14485346

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Embodiments of the present disclosure provide methods for patterning a hardmask layer disposed on a metal layer, such as a copper layer, to form an interconnection structure in semiconductor devices. In one embodiment, a method of patterning a hardmask layer on a metal layer disposed on a substrate includes supplying a first etching gas mixture comprising a carbon-fluorine containing gas and a chlorine containing gas into a processing chamber to etch a portion of a hardmask layer disposed on a metal layer formed on a substrate, supplying a second etching gas mixture comprising a hydrocarbon gas into the processing chamber to clean the substrate, and supplying a third etching gas mixture comprising a carbon-fluorine containing gas to remove a remaining portion of the hardmask layer until a surface of the metal layer is exposed.

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Patent Owner(s)

Patent OwnerAddress
APPLIED MATERIALS INC3050 BOWERS AVENUE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
AGARWAL, Sumit Dublin, US 107 3003
HSIEH, Shawn Hsinchu, TW 1 2
HUNG, Cary Hsinchu, TW 3 3
KUO, Chiu-pien Zhubei City, TW 4 73

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