INTERFACE TO EXPOSE INTERRUPT TIMES TO HARDWARE
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United States of America Patent
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Issued Date -
Mar 17, 2016
app pub date -
Sep 17, 2014
filing date -
Sep 17, 2014
priority date (Note) -
Abandoned
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Abstract
A power management controller is used to control power management states of a processing device. A register stores a timer tick value accessible to the power management controller. The timer tick value indicates when an interrupt is to occur in the processing device. The power management controller may use the exposed timer tick value to decide whether to transition between power management states such as an active state, an idle state, and a power-gated state. The timer tick value stored in the register may be modified by an operating system, an application, or software implemented on the processing device.
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