CLOCK GATING CIRCUITS AND CIRCUIT ARRANGEMENTS INCLUDING CLOCK GATING CIRCUITS

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United States of America Patent

APP PUB NO 20160077544A1
SERIAL NO

14488588

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Abstract

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Clock gating circuits may include: a first inverter; a first switch having a first terminal and a second terminal, the first terminal of the first switch coupled to an output of the first inverter; a feedback circuit having an input-output terminal, the input-output terminal of the feedback circuit coupled to the second terminal of the first switch; and a first logic gate having a first input terminal and a second input terminal, the first input terminal coupled to the input-output terminal of the feedback circuit, the second input terminal electrically connected to receive a master clock signal.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDHSINCHU

International Classification(s)

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  • 2014 Application Filing Year
  • G06F Class
  • 51669 Applications Filed
  • 44228 Patents Issued To-Date
  • 85.60 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances2014201520162017201820192020202120222023202420250255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Yi-Feng Xinpu Township, TW 15 185
Shen, Meng-Hung Zhubei City, TW 33 97
Tzeng, Jiann-Tyng Hsin-Chu, TW 353 1028
Young, Charles Chew-Yuen Cupertino, US 127 466

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  • 8 Citation Count
  • G06F Class
  • 11.69 % this patent is cited more than
  • 9 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges3122144564193188710466053822701961379632401 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +010002000300040005000600070008000900010000110001200013000140001500016000

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