CLOCK GATING CIRCUITS AND CIRCUIT ARRANGEMENTS INCLUDING CLOCK GATING CIRCUITS
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Mar 17, 2016
app pub date -
Sep 17, 2014
filing date -
Sep 17, 2014
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
Clock gating circuits may include: a first inverter; a first switch having a first terminal and a second terminal, the first terminal of the first switch coupled to an output of the first inverter; a feedback circuit having an input-output terminal, the input-output terminal of the feedback circuit coupled to the second terminal of the first switch; and a first logic gate having a first input terminal and a second input terminal, the first input terminal coupled to the input-output terminal of the feedback circuit, the second input terminal electrically connected to receive a master clock signal.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully