THIN FILM TRANSISTOR, TRANSISTOR ARRAY, METHOD OF MANUFACTURING THIN FILM TRANSISTOR, AND METHOD OF MANUFACTURING TRANSISTOR ARRAY
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United States of America Patent
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Issued Date -
Mar 10, 2016
app pub date -
Sep 3, 2015
filing date -
Sep 5, 2014
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Abstract
Provided is a thin film transistor in which at least a support, source and drain electrodes constituted by a conductor, a semiconductor layer, an insulator layer, and a gate electrode constituted by a conductor are laminated in this order. In a laminated cross section of the thin film transistor, a difference between an electrode width of an electrode on a face coming into contact with the support and an electrode width thereof on a face which is opposite to the face coming into contact with the support and comes into contact with the semiconductor layer falls within a range of ±1 μm. When an arithmetic average roughness in the electrode width of the electrode on the face which is opposite to the face coming into contact with the support and comes into contact with the semiconductor layer is set to Ra, the relation of Ra≦10 nm is satisfied.
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