MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
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United States of America Patent
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Issued Date -
Mar 3, 2016
app pub date -
Mar 20, 2014
filing date -
Mar 27, 2013
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Abandoned
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Abstract
On a peripheral circuit area upon a semiconductor substrate, an NMOS gate stack, comprising a first high-dielectric film, an NMOS gate metal, and a first semiconductor film, is formed, and a PMOS gate stack, comprising a second high-dielectric film, a PMOS gate metal, and a second semiconductor film, is formed so that a predetermined step is formed between the NMOS gate stack and the PMOS gate stack. A third semiconductor film is formed over the entire surface of the semiconductor substrate so as to fill in the step. The third semiconductor film is planarized by way of CMP so as to form a fourth semiconductor film that is thinner than the third semiconductor film.
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