METHODS OF FORMING ISOLATED CHANNEL REGIONS FOR A FINFET SEMICONDUCTOR DEVICE AND THE RESULTING DEVICE

Number of patents in Portfolio can not be more than 2000

United States of America Patent

SERIAL NO

14859729

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A fin structure is formed in and above a substrate and includes a portion of a substrate semiconductor material, a first epi semiconductor material formed above the substrate semiconductor material portion, and a second epi semiconductor material formed above the first epi semiconductor material. A sacrificial gate structure is formed above the fin structure, a sidewall spacer is formed adjacent the sacrificial gate structure, and at least one etching process is performed to remove portions of the fin structure positioned laterally outside of the sidewall spacer so as to define a fin cavity source/drain regions and to expose edges of the fin structure positioned under the spacer. An epi etch stop layer is formed on the exposed edges of the fin structure and within the fin cavity, and the first epi semiconductor material is removed selectively from the fin structure so as to form a channel cavity therein.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
GLOBALFOUNDRIES INCPO BOX 309 UGLAND HOUSE GRAND CAYMAN KY1-1104

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jacob, Ajey Poovannummoottil Watervliet, US 195 1585
Loubet, Nicolas Guilderland, US 245 2330

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation