METHODS FOR DESIGNING PHOTONIC DEVICES

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United States of America Patent

APP PUB NO 20160012176A1
SERIAL NO

14858519

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Abstract

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A compact, low-loss and wavelength insensitive Y-junction for submicron silicon waveguides. The design was performed using FDTD and particle swarm optimization (PSO). The device was fabricated in a 248 nm CMOS line. Measured average insertion loss is 0.28±0.02 dB across an 8-inch wafer. The device footprint is less than 1.2 μm×2 μm, orders of magnitude smaller than MMI and directional couplers.

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Patent Owner(s)

Patent OwnerAddress
NOKIA SOLUTIONS AND NETWORKS OYESPOO FINLAND ESPOO SOUTHERN FINLAND

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hochberg, Michael J New York, US 140 1799
Liu, Yang Elmhurst, US 1941 7962
Ma, Yangjin Brooklyn, US 57 391
Shi, Ruizhi New York, US 48 368
Zhang, Yi Elkton, US 1881 15120

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