EXPOSED DIE QUAD FLAT NO-LEADS (QFN) PACKAGE
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United States of America Patent
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N/A
Issued Date -
Jan 7, 2016
app pub date -
Jul 2, 2014
filing date -
Jul 2, 2014
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Consistent with an example embodiment, there is a method for packaging an integrated circuit (IC) device. The method comprises attaching a lead frame to the carrier tape; the lead frame has an array of device positions on the carrier tape and pad landings surround the device positions for making electrical connections to the plurality of active device die. A plurality of active device die are mounted on the carrier tape within the array of device positions; each said active device die has bond pads, each of said active device die has been subjected to back-grinding to a prescribed thickness and has a solderable conductive surface on its underside. On the bond pads, the plurality of active devices are wire bonded to the pad landings on the lead frame. The lead frame and wire bonded active devices are encapsulated, leaving the solderable die backside and lead frame backside exposed.
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