GATE CONFIGURATION WITH STRESS IMPACT AMPLIFICATION
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United States of America Patent
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Issued Date -
Dec 24, 2015
app pub date -
Sep 25, 2014
filing date -
Jun 23, 2014
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Abandoned
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Abstract
A gate configuration with stress impact amplification comprises an element activation zone, at least two source/drain electrodes, a first x direction poly configuration, at least two second x direction dummy poly configurations, at least two y direction dummy poly configurations and two gate electrodes. The at least two source/drain electrodes are located on the element activation zone and are paired as top-down sequence. The first x direction poly configuration is located on the element activation zone, divides the element activation zone into two equal zones and separates the at least two source/drain electrodes. The present invention disperses the stress of the contact-etch-stop-layer (CESL) to the y direction dummy poly configurations.
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