System for generating a test pattern to detect and isolate stuck faults for an interface using transition coding

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United States of America Patent

PATENT NO 9852806
SERIAL NO

14746477

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Abstract

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Conventional methods using signal test patterns to identify wiring errors are difficult to apply to interfaces encoding information as signal state transitions rather than directly as signal states. A system utilizing excitation of wires with selected transition coded patterns and evaluation of received results is described to identify failed wire connections. This approach may be advantageously used to provide fault detection and redundant path selection in systems incorporating stacked chip interconnections using Through Silicon Vias.

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Patent Owner(s)

Patent OwnerAddress
KANDOU LABS S A1025 SAINT-SULPICE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Keay, John D Bedford, GB 12 591
Stauffer, David R Essex Junction, US 10 132
Stewart, Andrew Kevin John Astcote, GB 14 658

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