Arrays Comprising Vertically-Oriented Transistors and Integrated Circuitry Comprising a Conductive Line Buried in Silicon-Comprising Semiconductor Material

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United States of America Patent

SERIAL NO

14829818

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Abstract

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An array includes vertically-oriented transistors, rows of access lines, and columns of data/sense lines. Individual of the rows include an access line interconnecting transistors in that row. Individual of the columns include a data/sense line interconnecting transistors in that column. The data/sense line has silicon-comprising semiconductor material between the transistors in that column that is conductively-doped n-type with at least one of As and Sb. The conductively-doped semiconductor material of the data/sense line includes a conductivity-neutral dopant between the transistors in that column. Methods are disclosed.

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Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT633 WEST FIFTH STREET 24TH FLOOR LOS ANGELES CA 90071

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hu, Yongjun Jeff Boise, US 165 1179
McTeer, Allen Eagle, US 91 1541

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