REDUNDANT INFORMATION COMPRESSION METHOD, AND SEMICONDUCTOR DEVICE
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United States of America Patent
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Issued Date -
Nov 19, 2015
app pub date -
Apr 30, 2015
filing date -
May 13, 2014
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Abstract
A redundancy information compression method is configured to compress redundancy information among a plurality of macros for which redundancy processing is performed. The redundancy information compression method includes setting faulty bit position information, included in the redundancy information, for a macro of the plurality of macros including a faulty bit, the faulty bit position information indicating a position of the faulty bit included in the macro; and organizing macro numbers, included in the redundancy information, of macros of the plurality of macros having the same faulty bit position information as the set faulty bit position information together.
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