REDUNDANT INFORMATION COMPRESSION METHOD, AND SEMICONDUCTOR DEVICE

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United States of America Patent

APP PUB NO 20150333777A1
SERIAL NO

14701126

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Abstract

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A redundancy information compression method is configured to compress redundancy information among a plurality of macros for which redundancy processing is performed. The redundancy information compression method includes setting faulty bit position information, included in the redundancy information, for a macro of the plurality of macros including a faulty bit, the faulty bit position information indicating a position of the faulty bit included in the macro; and organizing macro numbers, included in the redundancy information, of macros of the plurality of macros having the same faulty bit position information as the set faulty bit position information together.

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Patent Owner(s)

Patent OwnerAddress
SOCIONEXT INC2-10-23 SHIN-YOKOHAMA KOHOKU-KU YOKOHAMA-SHI KANAGAWA 222-0033

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  • 2015 Application Filing Year
  • H03M Class
  • 1731 Applications Filed
  • 1578 Patents Issued To-Date
  • 91.17 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances20152016201720182019202020210255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
AKIYOSHI, Hideo Nishitama, JP 18 73

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