N-TYPE III-V SEMICONDUCTOR STRUCTURES HAVING ULTRA-SHALLOW JUNCTIONS AND METHODS OF FORMING SAME

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United States of America Patent

APP PUB NO 20150333128A1
SERIAL NO

14277887

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Abstract

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Provided are methods of fabricating a semiconductor structure. The methods include providing a III-V semiconductor substrate selected from InGaAs and InAs, introducing an n-type dopant selected from S, Se, and Te directly onto a surface of the III-V semiconductor substrate, introducing a co-dopant selected from N and P directly onto a surface of the III-V semiconductor substrate, and diffusing the n-type and co-dopant into the III-V semiconductor substrate, thereby forming an n-doped III-V semiconductor substrate containing the n-type dopant and the co-dopant. The methods produce inventive semiconductor structures, and devices that include the semiconductor structure.

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SEMATECH INC2706 MONTOPOLIS DRIVE AUSTIN TX 78741

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
LEE, Rinus Albany, US 2 0
LOH, Wei-Yip Loudonville, US 56 246
TIECKELMANN, Robert Clifton Park, US 3 11

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