Controlling Gate Formation for High Density Cell Layout
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United States of America Patent
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Jun 26, 2015
filing date -
Dec 15, 2004
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Abstract
Methods of forming a semiconductor structure and the semiconductor structure are disclosed. In one embodiment, a semiconductor structure includes a substrate having a first active region, a second active region, and an insulating region separating the first and the second active regions. The structure further includes a vertical gate structure extending over the first and the second active regions and the insulating region, and a horizontal gate structure extending over the insulating region between the first and the second active regions.
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