FORMING GATE TIE BETWEEN ABUTTING CELLS AND RESULTING DEVICE
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United States of America Patent
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Issued Date -
Oct 29, 2015
app pub date -
Apr 28, 2014
filing date -
Apr 28, 2014
priority date (Note) -
Abandoned
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Abstract
Methods for forming abutting FinFET cells with a single dummy gate and continuous fins, and the resulting devices, are disclosed. Embodiments may include forming one or more continuous fins on a substrate, forming gates perpendicular to and over the one or more continuous fins to form a first FinFET cell and a second FinFET cell, and forming source and drain contact lines parallel to and between the gates, wherein a source contact line of the first FinFET cell is adjacent to a drain contact line of the second FinFET cell, and the source contact line and the drain contact line are on opposite sides of a gate.
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