STRESS ENHANCED HIGH VOLTAGE DEVICE
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United States of America Patent
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app pub date -
Jun 22, 2015
filing date -
Aug 8, 2012
priority date (Note) -
Abandoned
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Abstract
A method of forming a device is disclosed. A substrate having a device region is provided. The device region comprises a source region, a gate region and a drain region defined thereon. A gate is formed in the gate region, a source is formed in the source region and drain is formed in the drain region. A trench is formed in an isolation region in the device region. The isolation region underlaps a portion of the gate. An etch stop (ES) stressor layer is formed over the substrate. The ES stressor layer lines the trench.
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