Embedded Memory Device With Silicon-On-Insulator Substrate, And Method Of Making Same
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United States of America Patent
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Issued Date -
Sep 17, 2015
app pub date -
Mar 17, 2014
filing date -
Mar 17, 2014
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Abstract
A semiconductor device having a silicon substrate with a first area including a buried insulation layer with silicon over and under the insulation layer and a second area in which the substrate lacks buried insulation disposed under any silicon. Logic devices are formed in the first area having spaced apart source and drain regions formed in the silicon that is over the insulation layer, and a conductive gate formed over and insulated from a portion of the silicon that is over the insulation layer and between the source and drain regions. Memory cells are formed in the second area that include spaced apart second source and second drain regions formed in the substrate and defining a channel region therebetween, a floating gate disposed over and insulated from a first portion of the channel region, and a select gate disposed over and insulated from a second portion of the channel region.
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