Method for manufacturing a transistor with self-aligned terminal contacts
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United States of America Patent
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Mar 29, 2016
Grant Date -
Sep 10, 2015
app pub date -
May 18, 2015
filing date -
Jul 17, 2012
priority date (Note) -
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Abstract
A MOS transistor includes a semiconductor layer with a drain region and a body region. A first insulating layer is disposed over the semiconductor layer, a gate-precursor layer is disposed over the first insulating layer, a second insulating layer disposed over the first insulating layer and a third insulating layer disposed over the second insulating layer. A source opening extends through the third insulating layer, the second insulating layer, the gate-precursor layer, and the first insulating layer. An implant through the source opening forms a source-precursor region in the semiconductor layer. The source opening is then lined and an body contact opening is made through the liner, the source-precursor region and into the body region. An implant through the body contact opening forms the body contact region below the source-precursor. The body contact opening is then filled with a metal.
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