Voltage doubling circuit for an analog to digital converter (ADC)
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United States of America Patent
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Mar 29, 2016
Grant Date -
Sep 3, 2015
app pub date -
Feb 6, 2015
filing date -
Feb 28, 2014
priority date (Note) -
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Abstract
In one embodiment, a circuit includes a first input of a comparator for an analog to digital converter (ADC). The first input is coupled to a first capacitive network. The circuit further includes a second input of the comparator for the ADC. The second input is coupled to a second capacitive network. The first capacitive network includes a first set of capacitors where a first plate of the first set of capacitors is selectively coupled to an input signal. The second capacitive network includes a second set of capacitors where a second plate of the first set of capacitors is selectively coupled to the input signal. The first plate and the second plate are opposite plates of the first set of capacitors and the second set of capacitors.
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