Memory device with programmed device address and on-die-termination
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United States of America Patent
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Apr 5, 2016
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app pub date -
May 14, 2015
filing date -
Jun 2, 2006
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Abstract
An identifier value stored within a programmable register of a memory device is compared with a selector address received, together with a memory access command, via a signaling interface having at least one I/O node coupled to a bidirectional signaling line. On-die termination circuitry is transitioned between first and second states or maintained in one or the other of the first and second states based, at least in part, on whether the selector address matches the identifier value, with transition to the first state including switchably coupling a first termination resistance between the I/O node and a supply voltage line.
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