MEMORY SYSTEM PROVIDED WITH NAND FLASH MEMORY AND METHOD INCLUDING SIMULTANEOUSLY WRITING DATA TO FIRST AND SECOND DISTRICTS
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United States of America Patent
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app pub date -
May 14, 2015
filing date -
Sep 22, 2011
priority date (Note) -
Abandoned
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Abstract
A memory system includes first and second districts, and a control section. Each of the first and second districts includes a memory cell array. The control section receives a single write command to simultaneously write first data to the first and second districts. A memory controller may subsequently issue a read command to read the first data from one of the memory cell arrays to determine whether the read first data is normal or is correctable based on a result of error correction in an error correction circuit. When the read first data is normal, the first data written to the other of the memory cell arrays may be deleted or nullified.
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