Gray code counter
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United States of America Patent
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Apr 11, 2017
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app pub date -
Feb 26, 2014
filing date -
Feb 26, 2014
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Abstract
One or more gray code counters, counter arrangements, and phase-locked loop (PLL) circuits are provided. A gray code counter comprises a set of cells, such as standard cells, that output a gray code signal. The gray code counter comprises a pre-ready cell that provides an early signal, generated based upon an early clock, to one or more cells to reduce delay. A counter arrangement comprises one or more counter groups configured to provide pixel count levels for pixels, such as pixels of an image sensor array. A counter group comprises a gray code counter configured to provide a gray code signal to latch counter arrangements of the counter group. A PLL circuit comprises a gray code counter configured to generate a gray code signal used by a digital filter to adjust an oscillator. The gray code signal provides n-bit early/late information to the digital filter for adjustment of the oscillator.
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