Integrated circuit with transistor array and layout method thereof

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9379112
SERIAL NO

14192121

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An integrated circuit includes a plurality of transistors. The transistors are electrically connected in series and with their respective gates tied together. The transistors are implemented within a transistor array. The transistors are electrically connected between a first reference terminal and a second reference terminal. A non-dominator part of the transistors adjacent to the first reference terminal are implemented at corner regions of the transistor array.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTDHSINCHU

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Ching-Ho Hsinchu, TW 13 127
Horng, Jaw-Juinn Hsinchu, TW 148 485
Peng, Yung-Chow Hsinchu, TW 205 737

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
11.5 Year Payment $7400.00 $3700.00 $1850.00 Dec 28, 2027
Fee Large entity fee small entity fee micro entity fee
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00