PSEUDO-DIFFERENTIAL READ SCHEME FOR DUAL PORT RAM

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United States of America Patent

APP PUB NO 20150235681A1
SERIAL NO

14279796

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Abstract

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A memory read system includes a memory column having a plurality of dual port memory cells that are controlled by separate read word lines and a read bit line structure organized into upper and lower read bit line portions. Additionally, the memory read system also includes a pseudo-differential memory read unit coupled to the read bit line structure, wherein the upper and lower read bit line portions respectively control corresponding upper and lower local bit lines to provide a global bit line for the memory column. A method of reading a memory is also included.

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Patent Owner(s)

Patent OwnerAddress
NVIDIA CORPORATION2788 SAN TOMAS EXPRESSWAY SANTA CLARA CA 95051

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Gang Shanghai, CN 944 8640
Guo, Jing Shanghai, CN 159 278
Lin, Hwong-Kwo Santa Clara, US 27 171
Wang, Yiqi Shanghai, CN 28 110

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