METHODS OF MAKING COMPLIANT SEMICONDUCTOR CHIP PACKAGES
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United States of America Patent
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N/A
Issued Date -
Jul 9, 2015
app pub date -
Mar 19, 2015
filing date -
Oct 31, 1995
priority date (Note) -
Abandoned
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Abstract
A compliant layer is provided over a face of an undiced semiconductor wafer to form a portion of said compliant layer over each of a plurality of semiconductor chips integral with one another in the undiced wafer, each semiconductor chip having a plurality of contacts at its face. The compliant layer has a bottom surface adjacent the chip face, a top surface facing away from the bottom surface, and a sloping surface between the top and bottom surfaces. Bond ribbons of electrically conductive material are formed each extending from a contact of a respective semiconductor chip, along the sloping surface and the top surface of a portion of the compliant layer to a terminal supported by the top surface of the compliant layer. The packages are then separated from one another by dicing the wafer at semiconductor chip boundaries.
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