SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF

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United States of America Patent

APP PUB NO 20150179597A1
SERIAL NO

14183872

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Abstract

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A semiconductor package is provided, which includes: a first electronic element; a plurality of conductive elements formed on the first electronic element; a second electronic element having a plurality of conductive bumps and disposed on the first electronic element through the conductive bumps, wherein the conductive bumps are correspondingly electrically connected to the conductive elements; and an underfill formed between the second electronic element and the first electronic element for encapsulating the conductive bumps and the conductive elements, wherein the underfill contains a plurality of conductive particles having a particle size between 0.1 and 1 um, a plurality of insulating particles having a particle size between 1 and 10 um and a polymer. The invention overcomes the conventional drawback of poor electrical connection between the second electronic element and the first electronic element through the conductive particles so as to enhance the electrical performance of the semiconductor package.

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Patent Owner(s)

Patent OwnerAddress
SILICONWARE PRECISION INDUSTRIES CO LTDTAICHUNG

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Li, Pai-Yuan Taichung, TW 8 27
Lin, Chun-Tang Taichung, TW 47 134

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