MEMORY MANAGEMENT METHOD, MEMORY CONTROLLING CIRCUIT UNIT, AND MEMORY STORAGE DEVICE
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United States of America Patent
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Issued Date -
Jun 11, 2015
app pub date -
Jan 22, 2014
filing date -
Dec 9, 2013
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Abstract
A memory management method, a memory controlling circuit unit and a memory storage device are provided. The method includes: configuring a plurality of super physical erasing units, wherein each of the super physical erasing units includes at least two physical erasing units. A first super physical erasing unit includes a first physical erasing unit and a second physical erasing unit that belong to different operation units. The first physical erasing unit and the second physical erasing unit store different parts of first data. The physical erasing unit storing least valid data from each operation unit is selected for executing a garbage collection procedure. Accordingly, an efficiency of the garbage collection procedure is increased.
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