Importance

Loading Importance Indicators...

Abstract

The present invention provides a method for fabricating a FinFET on a germanium or group III-V semiconductor substrate. The process flow of the method mainly includes: forming a pattern structure for a source, a drain and a fine bar connecting the source and the drain; forming an oxide isolation layer; forming a gate structure, a source and a drain structure; and forming metal contacts and metal interconnections. The method may allow an easy fabrication of a FinFET on a germanium or group III-V semiconductor substrate, and the entire process flow is similar to a conventional silicon-based integrated circuit fabrication technology despite it is achieved based on the germanium or group III-V semiconductor material. The fabrication process is simple, convenient and has a short period. In addition, the FinFET fabricated by the above process flow has a minimum width that can be controlled to about 20 nm. The multi-gate structure can provide excellent gate control capacity, which is very suitable for fabricating an ultra-short channel device so as to further reduce the device size. Further, the FinFET fabricated by the present invention has lower power consumption.

Loading the Abstract Image...

First Claim