Oscillator Buffer and Method for Calibrating the Same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20150137898A1
SERIAL NO

14540967

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A buffering circuit for buffering an oscillator signal. The buffering circuit includes a plurality of PMOS and NMOS transistor pairs connected in parallel, each pair having connected gate terminals and connected drain terminals forming an inverter circuit, each pair arranged for receiving via a direct coupling an oscillator signal at its gate terminal, and each pair further being connected with an additional PMOS and NMOS transistor. The buffering circuit also includes a control circuit arranged for receiving an output signal provided by the inverter circuits, for deriving information on the DC level of the output signal, and for adjusting a voltage transfer curve expressing a relationship between a voltage at the input and output of the buffering circuit, by switching on or off the additional PMOS and NMOS transistors based on the derived information

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Patent Owner(s)

Patent OwnerAddress
STICHTING IMEC NEDERLAND5656 AE EINDHOVEN

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chillara, Vamshi Krishna Limerick, IE 9 35
Liu, Yao-Hong Sinjhuang, TW 25 95
Staszewski, Robert Bogdan Delft, NL 143 1444

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