TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

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United States of America Patent

SERIAL NO

14476753

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Abstract

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A transistor structure disposed on a substrate includes a gate electrode, an organic semiconductor layer, a gate insulation layer and a patterned metal layer. The gate insulation layer is disposed between the gate and the organic semiconductor layer. The patterned metal layer has a conductive oxidation surface and is divided into a source electrode and a drain electrode. A portion of the organic semiconductor layer is exposed between the source electrode and the drain electrode. The conductive oxidation surface directly contacts with the organic semiconductor layer.

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Patent Owner(s)

Patent OwnerAddress
E INK HOLDINGS INCNO 3 LI SHIN RD 1 SCIENCE-BASED INDUSTRIAL PARK HSINCHU

International Classification(s)

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  • 2014 Application Filing Year
  • H01L Class
  • 23828 Applications Filed
  • 21803 Patents Issued To-Date
  • 91.51 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances2014201520162017201820192020202120222023202420250255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hsu, Cheng-Hang Hsinchu, TW 23 40
Shinn, Ted-Hong Hsinchu, TW 136 961
Wang, Chih-Hsuan Hsinchu, TW 15 22
Wang, Henry Hsinchu, TW 108 892

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Patent Citation Ranking

  • 1 Citation Count
  • H01L Class
  • 10.46 % this patent is cited more than
  • 10 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges1377800619237183722181459473474314501 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +05001000150020002500300035004000450050005500600065007000750080008500

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